1. Field of the Invention
The invention relates to the manufacture of highly dense integrated circuits and more particularly to the formation of a field oxide isolation region within the integrated circuit.
2. Description of the Prior Art
In the manufacture of highly dense integrated circuits, individual device structures are typically separated and electrically isolated by means of a field oxide isolation region. The isolation region is typically produced by the exposure of a silicon wafer to an oxidizing atmosphere while using an oxidation mask to protect regions which are not desired to be oxidized. These latter regions will be the location for the active device structures. One widely used technique for creating isolation regions is called LOCOS--for LOCal Oxidation of Silicon.
In the LOCOS technique, a pad oxide is grown on the surface of a silicon substrate. A silicon nitride layer is deposited on the surface of the pad oxide, and then patterned to create an oxidation mask. The exposed areas of the substrate are then oxidized to form the field oxide isolation regions. The oxidation mask is removed and the device structures are created in subsequent processing steps.
The LOCOS method has problems, however, especially as device geometries continue to get smaller. During oxidation, oxygen diffuses through the pad oxide to the substrate and forms an undesired "bird's beak". The bird's beak extends the field isolation region into the active device region, reducing the area in which devices can be built. At geometries less than 0.8 microns, the bird's beak length using LOCOS can no longer be tolerated.
Furthermore, the LOCOS method produces field isolation regions that have poor planarity. This nonplanar topography is inadequate to meet sub-micron lithography requirements. Non-planarity also causes the problem of "polyline necking", which results in either a narrowing or widening of a polysilicon line, and is believed to be caused by photo scattering at the steep edge of the field oxide.
Workers in the field are aware of these problems. To reduce encroachment into active device regions by the bird's beak, a layer of undoped polysilicon is added between the pad oxide and silicon nitride layers, in what is referred to as PBLOCOS, or Polysilicon Buffered LOCal Oxidation of Silicon. An example is shown in U.S. Pat. No. 4,829,019. The polysilicon layer in this invention is intended to block oxygen from diffusing into the pad oxide and substrate, thereby reducing the bird's beak length. However, PBLOCOS leads to more severe topography problems than exist with LOCOS.
Other approaches to overcoming the solutions to the difficulties associated with LOCOS have been identified, but typically at the expense of much more complex processing. One simpler approach is described in "Polysilicon Encapsulated Local Oxidation" by S. S. Roth et al, in IEEE Electron Device Letters, Vol 12, No. 3, March 1991. In this technique, also called PELOX, a layer of pad oxide and a subsequent layer of silicon nitride are deposited on a silicon substrate, as in LOCOS, and an oxidation mask is patterned. As shown in FIG. 1, a buffered hydrofluoric solution is then used to undercut the nitride 12 and form a cavity 11 in the pad oxide 10. A thin reoxidation layer 13 is then grown by thermal oxidation of the exposed portions of silicon. Referring now to FIG. 2, a layer of polysilicon 14 is deposited on all surfaces and fills the cavity. The field oxide region is then created by thermal oxidation, and the oxidation mask removed by using standard etching techniques.
In U.S. Pat. No. 4,965,221, a layer of pad oxide and a subsequent layer of silicon nitride are deposited on a silicon substrate, as in LOCOS, and an oxidation mask is patterned. As shown in FIG. 3, a layer of oxide or polysilicon is then deposited and patterned to form spacers 17 adjacent to oxide layer 15 and nitride layer 16. These spacers are then used as a mask during an etch of recessed region 18. The field oxide region is then thermally grown and the oxidation mask removed.